1. Field of the Invention
A present invention generally relates to microprogrammed control systems and more particularly to interrupt systems which allow for the interruption of the currently executing microprogram within the microprogrammed control system and the invocation of an interrupt service routine to process the interrupt and upon completion of the interrupt service routine to return control to the interrupted microprogram.
2. Discussion of the Prior Art
Interrupts have long been employed in data processing systems to handle events which occur asynchronously to the software program being executed. For example, interrupts may be used to initiate the processing of such asynchronously generated conditions as the completion of an input/output operation (e.g., the reading of one record from magnetic tape) or the expiration of a timer. Interrupts may also be used to process an exception condition which occurs synchronously to the execution of a program such as the processing of an overflow resulting from the software doing an addition. Interrupts of the above type are called software interrupts and if the interrupt is enabled cause the currently executing software program to be interrupted, the current state of the data processing system is saved for later restoration and control is turned over to a software interrupt service routine at a predetermined address. Upon completion of the interrupt service routine, the previously saved state of the data processing system is restored and execution of the previously interrupted software program continues at the point of interruption.
More recently, with the advent of microprocessors, interrupt techniques have been applied to microprogrammed systems in which the interrupt causes the interruption of the microprogram being executed by the microprocessor and a microprogram interrupt routine is invoked to process the interrupt after the saving of the status of the microprocessor at the time of interruption. These interrupts of a microprogram will be referred to as hardware interrupts whereas the interrupts of a software program will be referred to as software interrupts.
The efficiency with which a microprogrammed system can handle hardware interrupts will determine whether the hardware interrupts may be processed by the microprogrammed system through the use of microprogramming or whether they must be handled by additional hardware logic within the system. For example, in a microprogrammed data processing system the input/output operations may be done under microprogram control. Various methods are known by which a microprogram may be employed to control an input/output operation. For example, once an input/output operation has begun the microprogrammed system may continually check, under microprogram control, the input/output status indicator and see whether the input/output device requires the attention of the microprocessor for servicing. Once a status check indicates that service is required, the microprogram may jump to a microprogrammed service routine to service the particular input/output operation. Alternatively, once an input/output operation has begun, a microprogram may proceed to do other tasks and periodically check various status indicators and if one indicates that servicing is required, branch to the routine to service the input/output operation and later return to the non-input/output tasks. The first method in which this task is checked continuously in a loop may waste too much microprogram processing time. The second method in which periodic status checks are made may also be inefficient if several input/output operations must be checked during each check period. Also, the second method may also introduce considerable time lag between the time the input/output operation indicates that it is ready to receive service and the time that the microprogram senses the status indicating that service is requested. These methods are known as polling.
As an alternative to these polling techniques, in which the microprogram checks a service request status indicator, an interrupt technique may be used. However, the time it takes before a single I/O operation under interrupt control can be serviced may be longer than the delay that occurs using a microprogram polling technique since the interrupt recognition hardware forced microprogram jump, and microprocessor status save sequence may require several microprocessor cycles before the interrupt service routine may be entered. Before the microprocessor resumes the interrupt microprogram, the contents of the microprocessor registers must be restored to their original values by the microprocessor system. Unfortunately, the more registers automatically stored by the microprocessor system the longer the interrupt response time which runs from initial recognition of an interrupt request to the execution of the first instruction of the interrupt service microprogram.
Alternatively, a more rapid hardware interrupt response can be provided by a microprocessor system which is specially designed to facilitate hardware interrupts. Some units have two sets of internal registers. The main microprogram is executing using one set of these registers while the interrupt service microprogram uses the other set. As a result, there is no interference and no requiring to store and restore the microprocessor registers. Other microprocessors use locations in data memory to replace some of the usual internal microprocessor registers. A work space pointer inside the registers defines the memory locations to be used. The interrupt hardware stores the modified contents of the pointer register before executing the interrupt service microprogram and thus defines a working space in data memory which differs from that in use by the main microprogram. After the interrupt service microprogram is complete, the pointer register is restored to its original value. A more complete discussion of the microprocessor interrupt handling techniques can be found in the paper entitled "Handle Microcomputer I/O Efficiently" by Dr. D. Philip Burton and Dr. Arthur L. Dexter found on page 70 of Electronic Design 13, June 21, 1978. Other papers entitled "Designing Interrupt Structures for Multiprocessor Systems" by R. Jaswa on page 101 of Computer Design, September, 1978; "Improved Microprocessor Interrupt" by M. Shima and R. Blacksher on page 96 of Electronic Design 9, Apr. 26, 1978; and "Handling Multilevel Subroutines and Interrupts in Microcomputers" by James F. Vittera on page 109 of Computer Design, January, 1978 also discuss interrupt structures.
Schemes dealing with software interrupts are shown in U.S. Pat. No. 3,866,181 issued to Byron G. Gayman et al entitled "Interrupt Sequencing Control Apparatus"; U.S. Pat. No. 3,984,820 issued to Philip E. Stanley et al entitled "Apparatus for Changing the Interrupt Level of a Process Executing in a Data Processing System"; and U.S. Pat. No. 4,020,471 issued to William E. Woods et al entitled "Interrupt Scan and Processing System for a Data Processing System".
A scheme dealing with interrupts in a microprogrammed data processing system is shown in U.S. Pat. No. 4,042,972 issued to Ronald Hans Gruner et al entitled "Microprogram Data Processing Technique and Apparatus".